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Upscaling photonic chip research and development capacity
As part of a large scale European initiative, TNO is currently building a pilot line for photonic chips at the High Tech Campus in Eindhoven. Through the Photonic Integration Technology Center, TU/e is directly involved to help establish standardized processes that enable the upscaling of photonic integrated circuit production.
The 6" InP pilot line that is currently under construction in Eindhoven is part of a large-scale European initiative called PIXEurope, which is a collaboration of R&D organisations in 11 European countries. This project aims to create a European network of prototyping and pilot lines to support businesses enabling and exploiting integrated photonics in Europe.
Kevin Williams, Chair of the Photonic Integration group, explains: ‘PIXEurope started in June 2025 and aims to establish a unified model for a rich diversity of materials, platforms and capabilities from monolithic circuits to heterogeneous integration, and from packaging to reliability,’ he explains. ‘It is a ten year project. The first five years will be dedicated to building and setting up the infrastructure, and during the next five years, the lines will be operational for collaborative research and industrial exploitation.’

Photo: Angeline Swinkels
Kevin Williams
Kevin Williams, Chair of the Photonic Integration group, explains: ‘PIXEurope started in June 2025 and aims to establish a unified model for a rich diversity of materials, platforms and capabilities from monolithic circuits to heterogeneous integration, and from packaging to reliability,’
Scaling up
In the pilot lines, everything will be scaled when compared to current research facilities, Williams says. ‘For example, the new line at TNO will work with highly reproducible processes on 6’’ wafers. This will be complementary to the more agile 4’’ wafer line that is being completed at the Nanolab@TU/e campus. Both lines will be developed in parallel to allow the transfer of processes. The 6’’ TNO line will focus on fine tuning processes to specific products, while the 4’’ TU/e line focusses on developing advanced processes.’ The main ambition for the pilot line is to establish standardized processes, he says. ‘From an operational perspective this means developing methods so that different knowledge institutes can collaborate efficiently and effectively with industry as one virtual supplier. From a technology perspective we also want to standardize and automate how we are developing products, how we are designing the chips, and how we do the testing.’ The TU/e plays a key role in the development of standardized and automated design and testing processes
At the moment, there are tens of ways of creating circuits, the scientist explains. ‘By using a standardized design flow, we want to come to an intercompatible framework for chip design that is agnostic for the material and the production line used.’ The aim is to come up with a system that looks and works the same for designers, no matter the production technology or facility. ‘By providing a standardized design kit that is validated and checked, we take the human factor out of the loop, thus preventing untraceable errors. To this end, we use open data standards and automated data flows from metrology tools and measurement equipment to recalibrate the design software and optimize the production equipment.’

Bringing together all pilot lines
The vision is to build design kits that can then be used by commercial software vendors who can process and release them in their own platforms, Williams says. ‘The software combines process data with powerful computer aided design to generate the design that a foundry can process. The method is used in the four electronics pilot lines, allowing designers to use the same design process for technologies across the entire semiconductor industry.’
Fortunately, the researchers do not have to start from scratch. ‘At TU/e, we have ample experience in building these types of design kits, we have been doing this for years with different companies, both for indium phosphide and more recently for silicon photonics foundries. We also have open standards in place. The big challenge now is to also include newer technologies and make our kits interoperable. For example, when a designer first designs a chip and later wants to add colloidal quantum dots, or 2D materials, the data in the different design kits needs to be validated and consistent. We are looking into questions like: How can we make sure that these different processes are aligned in such a way that they lead to a product with good quality output?’
Inline testing
The second topic the TU/e community is going to focus on, has to do with inline testing during production. ‘We want to develop tests from a perspective of what is easy to test. What can we automate, and which tests can we do fast, early on in the process, and at scale?’ The aim is to come up with tests that can predict statistically meaningful outcomes before failure occurs, enabling swift adaptations to the production process.
Williams also regards the pilot line project to be a next level investment in people and infrastructure. ‘All in all, PIXEurope comprises 400 million euros of investment. That shows confidence in the field, and it is a sign that also industry is now seriously looking at this technology. Slowly but surely, we are taking up a position alongside electronics. With AI coming, photonics will enter microprocessors and memory chips. Now the question is how photonics will play out in combination with other technologies. That question is also underlying the Chips Act II. The PIXEurope project is meant to develop technologies in universities or other Research and Technology Organizations, and to transfer that knowledge to industry with the aim to keep photonics in Europe. We need foundries and pilot lines to make this fly. And we also need a community of experts and developers to fuel this development. Training these experts is an important goal of these types of projects.’